74160 DATASHEET PDF

By wiring more than one 74LS together cascading , it is possible to make higher count lengths powers of ten. For example, two 74LSs cascaded together would yield a counter capable of decimally counting the range 00 - This counter IC can be cleared set to all zero at any time, by bringing the clear input to logical zero ground. During normal operation, such as counting mode, the clear input must be kept high either directly or through a pull up resistor. This is accomplished by applying the value to be preloaded on the chip's four data input lines, and bringing the load pin to logical zero temporarily.

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We use Cookies to give you best experience on our website. By using our website and services, you expressly agree to the placement of our performance, functionality and advertising cookies. Please see our Privacy Policy for more information. Abstract: No abstract text available Text: : These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Abstract: No abstract text available Text: I. Handling Procedures. Class 1 Thermal Im p e d an ce. Abstract: No abstract text available Text:. Users should follow p roper I. Users should tollow proper I. Users should follow proper I. Abstract: No abstract text available Text: single monolithic structure. Abstract: No abstract text available Text: are sensitive to electrostatic discharge. U sers should follow proper I. Abstract: No abstract text available Text: devices are sensitive to electrostatic discharge.

Handling Procedures , 2. OK, Thanks We use Cookies to give you best experience on our website. Previous 1 2 Rochester Electronics LLC. Coilcraft Inc. LS x12 LS 1Kx12bit. Truth Table pin diagram and truth table. Not Available Abstract: No abstract text available Text: are sensitive to electrostatic discharge. Not Available Abstract: No abstract text available Text: devices are sensitive to electrostatic discharge.

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